The weekly schedule includes three lecture slots each week. All slots will not be used every week; refer to the table below for empty slots and lecture topics. The schedule is preliminary. Thus, the table will be updated if necessary; previously empty slot will be utilized only if no other way is found (because of conflicts, the slots marked red are guaranteed not to be utilized for this course). Any changes to the lecture schedule will be announced in the Canvas Announcements.

Week	Monday	Thursday	Friday
1	Course intro and overview (LS)	VHDL 1 (SK)	Lab series intro and overview (SK)
2	–	VHDL 2 (SK)	VHDL code review (LS)
3	–	Lab series 2 (SK)	–
4	–	Implementation technologies (LS)	Hardware vs software (LS)
5	–	Synchronization approaches (LS)	PCB-level design (LS)
6	–	–	–
7	Power Dissipation (LS)	SoC-level design (LS)	Networks on Chip (IS)
8	A look into the future (LS)	Summary and exam prep (LS)	–

LS: Lars Svensson

SK: Sven Knutsson

IS: Ioannis Sourdis