Course syllabus
Course-PM
MCC150 MCC150 Implementation of digital signal processing systems lp4 VT21 (7.5 hp)
Course is offered by the department of Microtechnology and Nanoscience (MC2)
Contact details
- examiner Zhongxia Simon He (zhongxia@chalmers.se)
- lecturer Zhongxia Simon He (zhongxia@chalmers.se),
Magnus Karlsson <magnus.karlsson@chalmers.se>, Lars Svensson <lars.svensson@chalmers.se>, Erik Börjeson <erikbor@chalmers.se> - TA
- Erik Börjeson <erikbor@chalmers.se>
- Sining An, sininga@chalmers.se
Aim
We live in an era where more and more information is generated, stored and presented in a digital format: text, audio, pictures, video, well even currency. Digital signal processing (DSP) is a technology that supports not only our current lifestyle, but it will be even more essential in the future. By using different design approaches, DSP systems can be implemented on various platforms; from software inside a computer, to dedicated application-specific integrated circuits (ASICs) inside a cell phone. What implementation platform to use and what design approach to use, these choices depend on the DSP algorithm and the requirements of the application.
The first aim of this course is to introduce students to the implementation of DSP systems on different platforms, e.g., Field Programmable Gate Arrays (FPGAs), programmable signal processors, and ASICs. The second aim is to introduce design flows that allow designers to make trade-offs, e.g., between performance and power dissipation, as they carry out system implementation of DSP algorithm specifications. Specifically, we will address DSP implementation using mainstream FPGAs (e.g., Altera or Xilinx) in depth, for a few selected system applications (e.g., wireless communication, fiber communication, and radar). While the focus of the laboratory work and the design project is on FPGAs, DSP implementation using signal processors and ASICs will also be addressed and the three different DSP implementation platforms will be compared and contrasted.
Learning outcomes
- Describe a typical design flow for DSP systems, considering different DSP implementation platforms (for example, ASIC, FPGA, signal processor, and GPU) and implementation aspects such as parallelism, pipelining (folding), and fixed-point numbers
- Describe and analyze basic DSP building blocks, such as finite impulse response (FIR) filters, fast Fourier transform (FFT) blocks, direct digital synthesizers (DDSs), adaptive filters, equalizers, and carrier recovery blocks
- Describe how a DSP function can be implemented using different hardware resources and explain the trade-off between performance and resources
- In MATLAB, develop model components that are equivalent to hardware blocks, in order to simulate and optimize DSP circuits and systems
- Use professional design software tools for DSP design entry, simulation, implementation, debugging, and final deployment on an FPGA evaluation board to perform real-time DSP
- Evaluate DSP algorithms and their implementations with respect to, for example, silicon area utilization, data throughput, data latency, and power consumption
- Elaborate on advantages and limitations of implementing DSP using FPGAs, the main design trade-offs involved, and the performance that can be expected when using FPGAs versus signal processors versus ASIC
Exam
Examed based on report submission only due to covid
- 4 Lab Report (20pt each)
- 2 HA (HA contains different numbers of questions, each question 2pt, total 16)
- points for show up in lectures (4 pt total, 1pt for 1 lecture, points randomly added into lectures)
Total Points |
CTH Grade |
0-54 |
Fail |
55-69 |
3 |
70-84 |
4 |
85-100 |
5 |
Course summary:
Date | Details | Due |
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