Course syllabus

Course PM

 DAT094 Design of digital electronic systems lp1 HT20 (7.5 hp)

This course is offered by the department of Computer Science and Engineering.

Contact details

Name Role Email Phone Office
Lars Svensson Lecturer, examiner larssv@chalmers.se +46 31 772 1704 EDIT 4477
Sven Knutsson Lab teacher sven.knutsson@chalmers.se +46 31 772 5727 EDIT 4455A
Joel Svensson Lab teacher joels@chalmers.se
Naga Sarayu Nagarajan Lab TA sarayu@student.chalmers.se
Rakshitha Byadarahalli Madhusudhan Lab TA rakbya@student.chalmers.se
Adarsh Chandrasekaran Lab TA adarshc@student.chalmers.se

Teachers and TAs will be available at teaching time slots according to the schedule.  There is also a  Slack Workspace  to use for communicating about course matters.  You may also use email to addresses as given above.  Please include the string "DAT094" in the Subject line of your email; it helps us prioritize.

Course purpose

The course combines an overview of design platforms with in-depth studies of selected topics to give the student practical insights into building advanced embedded electronic systems. The emphasis is on design of digital hardware based on hardware-description languages and similar tools and representations. The abstraction level ranges from designing small-scale combinational and sequential logic to managing data flow between larger modules. Non-functional requirements such as performance are founded at the electronic level.

Schedule [updated Sep 3]

TimeEdit shows timeslots and rooms reserved for course activities.  Some lecture slots will not be used unless we have to reschedule, for example due to changes in pandemic restrictions.  Please refer to the Canvas Calendar for the actual schedule; any change in this schedule will be flagged up in a Canvas Announcement. 

Also, students are not asked to attend all lab slots. 

Course design

Broadly speaking, the course is organized around four topical themes, each of which will be treated in two weeks.  Each topic will contain lectures, lab assignments, and self studies.  The lab sessions are mandatory and individual lab reports must be submitted.  Examination details are further described below.  Material for each theme is gathered in a Canvas module. 

Due to the special circumstances of the pandemic, we strive to make it possible to carry out many activities from off-campus locations, for example if you need to self-isolate.  Some lectures will be recorded and videos will be made available; lab software tools will be made available also on servers with remote access; and teaching assistants will be available online for support.   Several software tools will be required for all of this to work.  Please refer to this page for more information. 

Course literature

We do not specify a textbook for this course; however, VHDL literature is useful for the lab course and for subsequent courses in the EESD programme. We recommend the textbook Dally et al: "Digital Design Using VHDL: a Systems Approach", and the reference book Ashenden: "Designer's Guide to VHDL" (the latter is also available as an E-book at the Chalmers library). Other good VHDL books may also be used.  Research articles and other supplementary material will be made available during the course.

Changes made since the last occasion

Labs have been reworked. The quiz-based examination will be complemented with oral checks.

Learning objectives and syllabus

The following are the learning objectives for this course:

  • Specify hardware behavior using hierarchical and parameterized descriptions.
  • Implement and verify digital parts of electronic systems in FPGAs using hardware description languages (HDLs) and simple design tools such as HDL simulators and synthesizers.
  • Discuss how design decisions can affect costs for design, manufacturing, and use of digital electronic systems and components.
  • Explain costs, performance, and other significant properties of common technology platforms (FPGA, ASIC, software on off-the-shelf processor, components on PCBs, ...).
  • Discuss methods for communication and synchronization between hardware blocks; and choose a suitable method based on capacity and costs. 

Here is a link to the syllabus on Studieportalen.

Examination form

Examination is carried out continuously during the course.  It is mainly founded on the series of four lab assignments. 

To pass each lab assignment, you need to attend the associated lab sessions (possibly via Zoom) until you are marked complete for the assignment; carry out the assigned tasks; and individually write and submit a brief report for each lab.  A passable report must cover all the assigned tasks; be substantially correct; be written in understandable English; be submitted as a PDF document; be marked with the student name and the date of submission; and use page numbers.  All submissions will be checked for plagiarism.

The lab assignments do not cover the entire content of each theme.  An accompanying Canvas quiz will address the remainder.  Each quiz will consist of 20 questions.  12 correct answers are required to pass.  It is possible to take each quiz 3 times, but a 16 hour delay is enforced between attempts.  As we cannot check IDs in Canvas, oral followups will be made.  As the quiz constitutes examination, violators may be subject to disciplinary action.

These are the minimum requirements and will earn the student the grade of 3 (Pass).  Teachers may assign a maximum of two bonus points per lab report, for a total maximum of 8 bonus points.  17 correct answers on a quiz will yield 1 bonus point; a perfect score (20/10) will yield two bonus points.  Thus, the maximum number of bonus points is 16. One bonus point will be subtracted for a lab report that is not submitted in a passable shape by the due date.

10 or more bonus points will earn the student the grade 4.   Students aspiring to the top grade (5) may take an oral exam at the end of the course.

Course summary:

Date Details Due