Course-PM

DAT110 Methods for electronic system design and verification Q2 Fall'21 (7.5 hp)

This course is offered by the Dept. of Computer Science and Engineering.

Contact details

Instructor: Prof. Per Larsson-Edefors
Lecturer technical writing: Anne Hsu Nilsson
TAs: Erik Börjeson and Chi Zhong

Course purpose

In light of the fact that we can integrate billions of transistors on a single integrated circuit, electronic system designers are forced to make use of computer-aided design tools, so-called Electronic Design Automation (EDA) tools, to manage design complexity and to meet, for example, strict timing, power dissipation and time-to-market budgets. Thus, apart from having skills in each of the abstraction levels, like circuit, logic, and architecture design, an electronic system designer must have a thorough understanding of design and verification methods that span the different abstraction levels and the algorithms that are leveraged inside the EDA tools.

The purpose of this course is to strengthen the student's knowledge in EDA-based design and verification methods and to make the student proficient in utilizing the right EDA tools, in the right context and in the right sequence.

Schedule

TimeEdit

Course literature

Electronic Design Automation for Integrated Circuits Handbook, 2nd Edition, by L. Lavagno, I. L. Markov, G. E. Martin, and L. K. Scheffer, CRC Press, 2016, ISBN 9781482254501.

Supplemental scientific papers for the group work on term papers.

Course design

Reflecting the need to integrate technical writing in our master's programs, there are two somewhat disconnected parts of this course; the lab exercises and the term paper. The lab exercises offer comprehensive hands-on training on industrially relevant design and verification problems using state-of-the-art EDA systems (from Cadence and Synopsys). In contrast, the term paper work gives the student an opportunity to study state-of-the-art research-level texts, which allows the student to focus on an appropriate and interesting technical area and at the same time obtain training in reading research papers and practice technical writing. The lectures supply the design and verification context of advanced electronic systems and will be useful both for the lab exercises and the term paper. Technical writing is explicitly integrated in all parts of the course, both in lab reports and in term papers.

Read more about deadlines and grading under Overview of deadlines and Principles of grading.

Use of Canvas

Canvas is clearly our platform for distributing lecture and lab material. In addition, we will handle student submissions of VHDL code and reports using predefined assignments.

Learning objectives and syllabus

Learning objectives:

1. describe the algorithmic principles of a number of important EDA concepts, such as behavioral and logic synthesis, logic simulation, static timing analysis, timing closure and power dissipation analysis
2. describe contemporary EDA design flows and their fundamental weaknesses and strengths
3. apply Linux-based EDA tools, including simple shell scripts, for design and verification of digital electronic systems
4. perform timing-driven synthesis and power dissipation analysis for digital circuits
5. critically and systematically integrate knowledge, to model, simulate, and evaluate features of digital ASIC design flows
6. clearly and unambiguously communicate his/her conclusions of laboratory work and in-depth term paper studies, the knowledge and rationale underpinning these.

Link to the syllabus on Studieportalen.

Study plan

Examination form

The examination has two parts:

1. Lab exercises, including synthesis and place-and-route for ASICs: 60% of total course grade is based on quality of preparation, VHDL hand in, and lab report.
2. Term paper work (in teams of 3 students) on selected topics, including a term paper report and an oral presentation: 40% of total course grade is based on quality of term paper report and oral presentation.