Course syllabus

Course PM

 DAT094 Design of digital electronic systems lp1 HT22 (7.5 hp)

This course is offered by the department of Computer Science and Engineering.

Contact details

Name Role Email Phone Office
Lars Svensson Lecturer, examiner larssv@chalmers.se +46 31 772 1704 EDIT 4477
Erik Börjeson Lab teacher erikbor@chalmers.se

EDIT 4447

Xu Wang Lab teacher xuwang@chalmers.se

 

Jorge Muñoz Bautista Lab TA jorgemun@student.chalmers.se

 

Jinsheng Bian Lan TA bianj@student.chalmers.se

 

Teachers and TAs will be available at teaching time slots according to the schedule.  There is also a Slack Workspace  to use for communicating about course matters.  You may also use email to addresses as given above.  Please include the string "DAT094" in the Subject line of your email; it helps us prioritize.

Course purpose

The course combines an overview of design platforms with in-depth studies of selected topics to give the student practical insights into building advanced embedded electronic systems. The emphasis is on design of digital hardware based on hardware-description languages and similar tools and representations. The abstraction level ranges from designing small-scale combinational and sequential logic to managing data flow between larger modules. Non-functional requirements such as performance are founded at the electronic level.

Secondarily, the course aims to improve academic writing skills, through seminars and written submissions.

Schedule

TimeEdit shows timeslots and rooms reserved for course activities (search for the course DAT094; don't forget to select the time period).  Some lecture slots will not be used unless we have to reschedule, for example due to illness.  Please refer to the Canvas Calendar for the actual schedule; any change in this schedule will be flagged up in a Canvas Announcement. 

Also, note that students are not asked to attend all lab slots each week.  More information in class.

Course design

Broadly speaking, the course is organized around four topical themes, each of which will be treated in two weeks.  Each topic will contain lectures, lab assignments, and self studies.  The lab sessions are mandatory and individual lab reports must be submitted.  Examination details are further described below.  Material for each theme is gathered in a Canvas module. 

Teaching activities are mainly based on student presence on campus.  We strive to make it possible to carry out some activities from off-campus locations, for example if you need to self-isolate.   Let us know if you need help with this.  

Course literature

We do not specify a textbook for this course; however, VHDL literature is useful for the lab course and for subsequent courses in the EESD programme. We recommend the textbook Dally et al: "Digital Design Using VHDL: a Systems Approach", and the reference book Ashenden: "Designer's Guide to VHDL" (the latter is also available as an E-book at the Chalmers library). Other good VHDL books may also be used.  Research articles and other supplementary material will be made available during the course.

Changes made since the last occasion

Labs have been somewhat reworked.  The academic-writing material has been significantly enhanced.

Learning objectives and syllabus

The following are the learning objectives for this course:

  • Specify hardware behavior using hierarchical and parameterized descriptions.
  • Implement and verify digital parts of electronic systems in FPGAs using hardware description languages (HDLs) and simple design tools such as HDL simulators and synthesizers.
  • Discuss how design decisions can affect costs for design, manufacturing, and use of digital electronic systems and components.
  • Explain costs, performance, and other significant properties of common technology platforms (FPGA, ASIC, software on off-the-shelf processor, components on PCBs, ...).
  • Discuss methods for communication and synchronization between hardware blocks; and choose a suitable method based on capacity and costs. 

Here is a link to the syllabus on Studieportalen.

Examination form

Examination is carried out continuously during the course.  It is mainly founded on the series of four lab assignments. By following the course and submitting everything on time, you will be able to pass the course without taking a specific exam at the end of the course. 

To pass each lab assignment, you need to attend the associated lab sessions until you are marked complete for the assignment; carry out the assigned tasks; and individually write and submit a brief lab report for each of the four lab assignment.  A passable report must cover all the assigned tasks; be substantially correct; be written in understandable English; be submitted as a PDF document; be marked with the student name and the date of submission; and use page numbers.  All submissions will be checked for plagiarism.

The lab assignments do not cover the entire content of each theme.  An accompanying Canvas quiz will address the remainder.  Each quiz will consist of 20 questions.  14 correct answers are required to pass.  It is possible to take each quiz 3 times, but a 16 hour delay is enforced between attempts.  As we cannot check IDs in Canvas, oral followups will be made.  As the quiz constitutes examination, violators may be subject to disciplinary action.

These are the minimum requirements and will earn the student the grade of 3 (Pass). Provided that these minimum requirements are fulfilled, higher grades can be earned through collection of bonus points during the course:

  • 17 correct answers on a quiz will yield one bonus point; a perfect score (20/20) will yield two bonus points. 
  • Teachers may assign a maximum of two bonus points per mandatory lab report.  Note: no bonus points will be assigned for a mandatory lab report which is not submitted in a passable shape by the due date.
  • An additional voluntary short writing assignment per theme may yield at most two extra bonus points. 

Thus, the maximum number of bonus points is 24.  8 or more bonus points yield the grade 4; 16 or more bonus points yield the grade 5. 

Course summary:

Date Details Due