Course syllabus

Course-PM

DAT105 / DIT051  Computer architecture lp1 HT24 (7.5 hp)

Course is offered by the Department of Computer Science and Engineering

Contact details

Lecturer: Visiting teacher Dr. Angelos Arelakis (angelos@chalmers.se)

Teach assistants (TA) 

  • Neethu Bal Mallya
  • Xu Wang
  • Mohammad Ali Maleki
  • Konstantinos Ioannis Sotiropoulos Pesiridis
  • Chen Hongguang
  • Celestine Valan Moses

Course representatives:

  • MPHPC    jacan@student.chalmers.se    Jacob Andersson
  • MPEES    ella_duan@outlook.com    Yiran Duan
  • MPHPC    kasperfa@student.chalmers.se    Kasper Fång Wiik
  • UTBYTE    ciaran.hoskins.2022@uni.strath.ac.uk    Ciaran Hoskins
  • MPCSN    oscar133750@gmail.com    Oscar Karlsson

 

Links 

Course purpose

Computers are a key component in almost any technical system today because of their functional flexibility as well as ability to execute fast in a power efficient way. In fact, the computational performance of computers has doubled every 18 months over the last several decades. One important reason is progress in computer architecture, the engineering discipline on computer design, which conveys principles for how to convert the raw speed of transistors into application software performance through computational structures that exploit the parallelism in software. This course covers the foundation and the important principles for how to design a computer that offers high performance to the application software.

Schedule

TimeEdit

Course literature

M. Dubois, M. Annavaram, P. Stenström. Parallel Computer Organization and Design. Cambridge University Press. 1st or 2nd edition. Both work. Available at Cremona at Chalmers. 

Supplemental education resources are provided at Canvas under Files and include copies of lecture slides, index to videos of all lectures, exercise references, articles for Real-stuff Studies and lab PM. 

Course design

With reference to the learning objectives (summarised at the bottom of this page), the course covers architectural techniques essential for achieving high performance for application software. It also covers simulation-based analysis methods for quantitative assessment of the impact a certain architectural technique has on performance and power consumption. The content is divided into the following parts:

1. The first part covers trends that affect the evolution of computer technology including Moore's law, metrics of performance (execution time versus throughput) and power consumption, benchmarking as well as fundamentals of computer performance such as Amdahl's law and locality of reference. It also covers how simulation-based techniques can be used to quantitatively evaluate the impact of design principles on computer performance.

2. The second part covers various techniques for exploitation of instruction level parallelism (ILP) by defining key concepts for what ILP is and what limits it. The techniques covered fall into two broad categories: dynamic and static techniques. The most important dynamic techniques covered are Tomasulo's algorithm, branch prediction, and speculation. The most important static techniques are loop unrolling, software pipelining, trace scheduling, and predicated execution.

3. The third part deals with memory hierarchies. This part covers techniques to attack the different sources of performance bottlenecks in the memory hierarchy such as techniques to reduce the miss rate, the miss penalty, and the hit time. Example techniques covered are victim caches, lockup-free caches, prefetching, virtually addressed caches. Also memory technology and virtualization is covered, to some extent, in this part.

4. The fourth part deals with multicore/multithreaded architectures, specifically different approaches for how multiple threads can share architectural resources: fine-grain/coarse-grain and simultaneous multithreading. We also introduce the concept of cache coherence and fundamental approaches to implement it.

Organization

The course is organized into lectures, exercises and three laboratory tasks. An important methodology to systematically design computers is to assess the impact of an architectural technique on performance. This will be trained by a number of illustrative exercises as well as in labs. The detailed organization of the course and the course plan is found in Files/Syllabus/Course_schedule.pdf.

The pedagogical approach uses some innovative approaches. First, for each lecture, it is expected that all students view the respective lecture available online on Youtube before class. The class will follow the flipped-classroom methodology to have the students in the forefront to ask the instructor based on the cases he provides. The purpose of this is to dive deeply into the design principles of computer architecture and focus on specific problems as well as questions. However, this only works if you as a student has watched the video. As a benefit of this, there will be a quiz in the beginning of each lecture session and if you have correct answers on three out of seven of these quizzes you will get four bonus points on the exam for higher grades. 

Another motivating example of modern pedagogy is to use case studies to practice the theoretical concepts being taught. To this end, you will be offered to study how state-of-the-art computer systems use the principles taught in the course. This is carried out by you in groups of two to study articles on a focused subject, for example, the pipeline design in a microprocessor from Intel and present to the rest of the students how it works. For that, you will also get four bonus points on the exam for higher grades.

The bonus points are added to the result on the exam and can be used for higher grades but not to pass the course. The bonus points are only valid for one year from the first exam. 

Learning objectives and syllabus

  • master concepts and structures in modern computer architectures in order to follow the research advances in this field
  • understand the principles behind a modern microprocessor to achieve a high performance for application software; especially advanced pipelining techniques that can execute multiple instructions in parallel
  • understand the principles behind modern memory hierarchies and storage systems; and
  • quantitatively assess the impact of an architectural technique on the performance of application software using state-of-the-art simulation tools.

Study plan (see Files/Syllabus)

 

Course summary:

Date Details Due