Course syllabus

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EDA284 / DIT361 Parallel computer architecture lp3 VT20 (7.5 hp)

Course is offered by the department of Computer Science and Engineering

Contact details

  • Miquel Pericas <miquelp@chalmers.se> (Examiner and Lecturer)
  • Mustafa Abduljabbar <musabdu@chalmers.se> (Teaching Assistant)
  • Jing Chen <chjing@chalmers.se> (Teaching Assistant)

Course purpose

 This course looks at the design of current multicore systems with an eye towards how those designs are likely to evolve over the next decade.

Student Representatives

    • Maria Aguilar Romero  <mafernandaguilar@outlook.com>  
    • Alice Gunnarsson <galice@student.chalmers.se>      
    • William Hjelm  <hjelmw@student.chalmers.se>     
    • Marcus Karegren  <karegren@student.chalmers.se>
    • Fredrik Lindberg <fredlin@student.chalmers.se>

Schedule

We will not use all the lecture slots show in TimeEdit. Check the Schedule under the Pages section for a detailed list of lectures and dates. The first session will be on Friday, Jan 24th at 8am. The lecture room is ML14. 

Schedule

TimeEdit

Course literature

  • Course Book
    • Parallel Computer Organization and Design, Michel Dubois, Murali Annavaram, Per Stenström, 2012
  • Additional readings will be provided during the lectures 

Course design

The content is divided into several parts:

  • a review of fundamental concepts in computer architecture
  • basic multiprocessor designs for the message passing and shared memory programming models
  • interconnection networks, an essential component in chip multiprocessors and scalable parallel computer systems
  • last years' recent transition towards chip multiprocessors (also known as "multicores")
  • how to correctly support parallel algorithms in shared memory hardware

A common thread running through all content parts is a discussion of cost trade-offs with respect to performance, power, energy, verifiability, programmability, and maintainability. A second unifying theme is the memory bottleneck, and the importance of efficient resource management.

Changes made since the last occasion

  • New lectures on the following topics: 
    • The Roofline Model (L6)
    • The European Processor Initiative (L15)
    • Lectures have been expanded to reflect modern trends in Vector processors (L2), GPUs (L10) and Message Passing Hardware (L11)
    • The lecture on interconnect networks (L9) has been turned into a guest lecture on the same topic (by Prof. Ioannis Sourdis)
  • The following lectures have been removed: 
    • Programming Models (materials are now part of DAT400)
    • Transactional Memory (considered less interesting) 
    • The lecture on interconnect networks (L9) is no longer part of the written examination
  • All three labs have been developed from scratch to be based on GEM5 and to focus on co-design
  • The project has been extended to include a roofline analysis

Learning objectives and syllabus

Learning objectives:

After completion of the course the student should be able to:
 
Knowledge and understanding
  • describe current approaches to parallel computing
  • explain the design principles of the hardware support for the shared memory and message passing programming models
  • describe the implementation of different models of thread-level parallelism, such as core multithreading, chip multiprocessors, many-cores or GPGPU
Competence and skills
  • implement synchronization methods for shared memory and message passing parallel computers
  • design scalable parallel software and analyze its performance
Judgement and approach
  • analyze the trade-offs of different approaches to parallel computing in terms of function, performance and cost
 

Link to the syllabus at Chalmers Study plan
Link to the syllabus at GU https://kursplaner.gu.se/pdf/kurs/en/dit361

Examination form

The course has three components: Labs, Written examination, and Project. 

The Labs are Pass/Fail. All lab reports need to be submitted and approved to get a Pass grade. A Pass grade in the Labs is necessary to get a Pass grade on the full course. 

Chalmers (CTH):

Both the Written Examination and the Project are graded on the scale: F, 3, 4, 5. A pass on both sub-courses is needed to get at least a 3 on the full course. The final grade for the course is determined according to the following table

Written Exam 3 3 3 4 4 4 5 5 5
Project 3 4 5 3 4 5 3 4 5
Final Grade 3 3 4 4 4 5 4 5 5

 

Gothenburg University (GU): 

Both the Written Examination and the Project are graded on the scale VG: Fail (U), Pass (G), Pass with Distinction (VG). A pass on both sub-courses is needed to get a Pass on the whole course. To get a Pass with Distinction (VG) grade on the full course, it is necessary to get a VG on both the Project and the Written Examination.

 

Course summary:

Date Details Due